Paper Info
Title
Chai-Tea, Cryptographic Hardware Implementations of xTEA
Abstract
The tiny encryption algorithm (TEA) was developed by [4] Wheeler and Needham as a simple computer program for encryption. This paper is the first design-space exploration for hardware implementations of the extended tiny encryption algorithm. It presents efficient implementations of XTEA on FPGAs and ASICs for ultra-low power applications such as RFID tags and wireless sensor nodes as well as fully pipelined designs for high speed applications. A novel ultra-low power implementation is introduced which consumes less area and energy than a comparable AES implementation. Furthermore, XTEA is compared with stream ciphers from the eSTREAM portfolio and lightweight ciphers. The high speed implementations of XTEA operate at 20.6 Gbps (FPGA) or 36.6 Gbps (ASIC).
Year
DOI
Venue
2008
10.1007/978-3-540-89754-5_28
INDOCRYPT
Keywords
Field
DocType
rfid tag,high speed application,ultra-low power application,efficient implementation,comparable aes implementation,hardware implementation,high speed implementation,cryptographic hardware implementations,tiny encryption algorithm,novel ultra-low power implementation,extended tiny encryption algorithm,asic,tea,fpga,symmetric key algorithms,stream cipher
XTEA,Symmetric-key algorithm,Computer science,Tiny Encryption Algorithm,Field-programmable gate array,Encryption,Application-specific integrated circuit,eSTREAM,Computer hardware,AES implementations,Embedded system
Conference
Volume
ISSN
Citations 
5365
0302-9743
12
PageRank 
References 
Authors
0.76
15
1
Name
Order
Citations
PageRank
Jens-Peter Kaps143037.83