Name
Abstract | ||
|---|---|---|
We introduce SImulation Verification with Augmentation (SIVA), a tool for coverage-directed state space search on digital hardware designs. SIVA tightly integrates simulation with symbolic techniques for efficient state space search. Specifically, the core algorithm uses a combination of ATPG and BDDs to generate “directed” input vectors, i.e., inputs which cover behavior not excited by simulation. We also present approaches to automatically generate “lighthouses” that guide the search towards hard-to-reach coverage goals. Experiments demonstrate that our approach is capable of achieving significantly greater coverage than either simulation or symbolic techniques in isolation. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1023/A:1011189608077 | J. Electronic Testing |
Keywords | Field | DocType |
functional verification,formal methods,guided search,coverage | Automatic test pattern generation,Functional verification,Computer science,Theoretical computer science,Real-time computing,State space search,Formal methods | Journal |
Volume | Issue | ISSN |
17 | 1 | 1573-0727 |
Citations | PageRank | References |
9 | 0.71 | 22 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Malay K. Ganai | 1 | 628 | 37.38 |
| Praveen Yalagandula | 2 | 1461 | 87.88 |
| Adnan Aziz | 3 | 1778 | 149.76 |
| Andreas Kuehlmann | 4 | 1217 | 105.62 |
| Vigyan Singhal | 5 | 961 | 86.42 |