Title
On rewiring and simplification for canonicity in threshold logic circuits
Abstract
Rewiring is a well developed and widely used technique in the synthesis and optimization of traditional Boolean logic designs. The threshold logic is a new alternative logic representation to Boolean logic which poses a compactness characteristic of representation. Nowadays, with the advances in nanomaterials, research on multi-level synthesis, verification, and testing for threshold networks is flourishing. This paper presents an algorithm for rewiring in a threshold network. It works by removing a target wire, and then corrects circuit's functionality by adding a corresponding rectification network. It also proposes a simplification procedure for representing a threshold logic gate canonically. The experimental results show that our approach has 7.1 times speedup compared to the-state-of-the-art multi-level synthesis algorithm, in synthesizing a threshold network with a new fanin number constraint.
Year
DOI
Venue
2011
10.1109/ICCAD.2011.6105360
ICCAD
Keywords
Field
DocType
boolean logic,threshold logic circuit,threshold logic,new fanin number constraint,multi-level synthesis,corresponding rectification network,threshold logic gate canonically,threshold network,traditional boolean logic design,multi-level synthesis algorithm,new alternative logic representation,verification,rectification,logic synthesis,decoder,logic gates,network synthesis,boolean functions,logic circuits,logic design
Logic synthesis,Boolean function,Logic gate,Boolean circuit,Pass transistor logic,Computer science,Logic optimization,Algorithm,Theoretical computer science,Electronic engineering,Boolean algebra,Craig interpolation
Conference
ISSN
ISBN
Citations 
1933-7760
978-1-4577-1398-9
7
PageRank 
References 
Authors
0.57
17
3
Name
Order
Citations
PageRank
Pin-Yi Kuo190.94
Wang Chun-Yao225136.08
Ching-Yi Huang35810.06