Title
The XTREM power and performance simulator for the Intel XScale core: Design and experiences
Abstract
Managing power concerns in microprocessors has become a pressing research problem across the domains of computer architecture, CAD, and compilers. As a result, several parameterized cycle-level power simulators have been introduced. While these simulators can be quite useful for microarchitectural studies, their generality limits how accurate they can be for any one chip family. Furthermore, their hardware focus means that they do not explicitly enable studying the interaction of different software layers, such as Java applications and their underlying runtime system software. This paper describes and evaluates XTREM, a power-simulation tool tailored for the Intel XScale microarchitecture. In building XTREM, our goals were to develop a microarchitecture simulator that, while still offering size parameterizations for cache and other structures, more accurately reflected a realistic processor pipeline. We present a detailed set of validations based on multimeter power measurements and hardware performance counter sampling. XTREM exhibits an average performance error of only 6.5% and an even smaller average power error: 4%. The paper goes on to present an application study enabled by the simulator. Namely, we use XTREM to produce an energy consumption breakdown for Java CDC and CLDC applications. Our simulator measurements indicate that a large percentage of the total energy consumption (up to 35%) is devoted to the virtual machine's support functions.
Year
DOI
Venue
2007
10.1145/1210268.1210272
ACM Trans. Embedded Comput. Syst.
Keywords
Field
DocType
multimeter power measurement,intel xscale core,average performance error,intel xscale technology,java cdc,microarchitecture simulator,parameterized cycle-level power simulator,simulator measurement,java application,performance simulator,xtrem power,power concern,smaller average power error,intel xscale microarchitecture,java,power measurements,power modeling,support function,chip,computer architecture
Hardware performance counter,Virtual machine,Computer architecture simulator,Cache,Computer science,Real-time computing,Software,Runtime system,Microarchitecture,Computer architecture,Simulation,Parallel computing,Energy consumption,Embedded system
Journal
Volume
Issue
ISSN
6
1
1539-9087
Citations 
PageRank 
References 
18
0.69
10
Authors
5
Name
Order
Citations
PageRank
Gilberto Contreras141036.87
Margaret Martonosi28647715.76
Jinzhang Peng3180.69
Guei-Yuan Lueh440137.41
Roy Ju512813.58