Name
Abstract | ||
|---|---|---|
The poster presents a set of design methodologies that can be used for the design of virtual circuits based on dynamically reconfigurable FPGAs. With the aid of these tools we can implement a system that requires more resources then the resources available on the targeted hardware. The design environment that has been developed is able to provide synthesis, simulation, test, and debug of such circuits. This design environment has been used with a commercial coprocessor PCI-board, as well as with a specially designed stand-alone XC6216 based board that is suitable for embedded applications. The timing results show that the IDELS can easily handle rather complex circuit designs. |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/FPGA.1999.803691 | FCCM |
Keywords | Field | DocType |
development systems,field programmable gate arrays,logic CAD,reconfigurable architectures,FPGA-based,development system,digital circuit,dynamically reconfigurable FPGAs,logic synthesis,virtual circuits | Logic synthesis,Computer architecture,Programmable Array Logic,Computer science,Programmable logic array,Field-programmable gate array,Register-transfer level,Programmable logic device,Reconfigurable computing,Hardware description language | Conference |
ISBN | Citations | PageRank |
0-7695-0375-6 | 1 | 0.46 |
References | Authors | |
1 | 9 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| V. Sklyarov | 1 | 35 | 3.89 |
| J. Fonseca | 2 | 1 | 0.46 |
| R. Monteiro | 3 | 1 | 0.80 |
| A. Oliveira | 4 | 1 | 0.80 |
| A. Melo | 5 | 1 | 0.46 |
| Nuno Lau | 6 | 81 | 12.70 |
| I. Skliarova | 7 | 31 | 3.90 |
| P. Neves | 8 | 1 | 0.80 |
| A. Ferrari | 9 | 2 | 0.95 |