Title
Matrix multiplication on LUCAS.
Abstract
Multiplication of two N by N matrices involves N3 multiplications of elements. The task allows a large amount of parallelism to be utilized, indicating that it can be efficiently executed on a parallel computer. This paper describes how matrix multiplication is performed on LUCAS, an SIMD type parallel processor with bit-serial processing elements. The interconnection network is of Perfect Shuffle/Exchange type. The case of study is when the number of processing elements is between N2 and N3. The algorithm presented can be applied to any computer with the same interconnection structure. Formulas showing how the execution time depends on data length and matrix size are presented together with measured values from execution on LUCAS.
Year
DOI
Venue
1983
10.1109/ARITH.1983.6158092
IEEE Symposium on Computer Arithmetic
Keywords
Field
DocType
matrix multiplication,parallel computer,parallel processing,indexes
Computer science,Matrix (mathematics),Parallel processing,Parallel computing,SIMD,Matrix chain multiplication,Arithmetic,Theoretical computer science,Multiplication,Execution time,Interconnection,Matrix multiplication
Conference
ISBN
Citations 
PageRank 
0-8186-0034-9
0
0.34
References 
Authors
0
2
Name
Order
Citations
PageRank
Lennart Ohlsson1376.10
Bertil Svensson213922.80