Name
Abstract | ||
|---|---|---|
A significant part of the power dissipation in CMOS digital circuits is due to the short-circuit currents. In this paper an accurate analytical model for the evaluation of the CMOS short-circuit power dissipation, on the basis of a CMOS inverter, is presented. The innovation of the proposed approach against previous works is due to the accurate, analytical expressions of the inverter output waveform which include for the first time the effects of both transistor currents and the gate-to-drain coupling capacitance. The α-power law MOS model which considers the carriers' velocity saturation effects of short-channel devices is used. The results produced by the suggested model show very good agreement with SPICE simulations. |
Year | DOI | Venue |
|---|---|---|
1998 | 10.5555/1275815.1275820 | Integrated Computer-Aided Engineering |
Keywords | Field | DocType |
accurate analytical model,cmos inverter,short-circuit current,power dissipation,suggested model,power law mos model,cmos digital circuit,cmos short-circuit power dissipation,analytical model,analytical expression,inverter output waveform | Inverter,FO4,Spice,Dissipation,Waveform,Velocity saturation,Electronic engineering,CMOS,Engineering,Transistor,Electrical engineering | Journal |
Volume | Issue | ISSN |
5 | 2 | 1069-2509 |
Citations | PageRank | References |
1 | 0.45 | 3 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| L. Bisdounis | 1 | 34 | 4.51 |
| S. Nikolaidis | 2 | 107 | 15.30 |
| O. Koufopavlou | 3 | 256 | 28.43 |