Name
Abstract | ||
|---|---|---|
We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematically elegant solutions to problems arising in the synthesis and optimization of synchronous digital hardware. Specifically, we derive a logical expression which yields a single finite state automaton characterizing the set of implementations that can replace a component of a larger design. The power of our approach is demonstrated by the fact that it generalizes immediately to arbitrary interconnection topologies, and to designs containing nondeterminism and fairness. We also describe control aspects of sequential synthesis and relate controller realizability to classical work on program synthesis and tree automata |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1109/43.875301 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Keywords | DocType | Volume |
index terms—automata theory,sequential logic synthesis.,elegant solution,logic S1S,program synthesis,discrete control,sequential synthesis,larger design,controller realizability,mathematical logic,sequential design,arbitrary interconnection topology,classical work,control aspect | Journal | 19 |
Issue | ISSN | ISBN |
10 | 1092-3152 | 0-8186-8200-0 |
Citations | PageRank | References |
14 | 1.01 | 25 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Adnan Aziz | 1 | 1778 | 149.76 |
| F. Balarin | 2 | 320 | 37.19 |
| Robert K. Brayton | 3 | 6224 | 883.32 |
| Alberto L. Sangiovanni-Vincentelli | 4 | 11385 | 1881.40 |