Name
Title | ||
|---|---|---|
A 32 kb 10T Sub-Threshold SRAM Array With Bit-Interleaving and Differential Read Scheme in 90 nm CMOS |
Abstract | ||
|---|---|---|
Ultra-low voltage operation of memory cells has become a topic of much interest due to its applications in very low energy computing and communications. However, due to parameter variations in scaled technologies, stable operation of SRAMs is critical for the success of low-voltage SRAMs. It has been shown that conventional 6T SRAMs fail to achieve reliable subthreshold operation. Hence, researche... |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/JSSC.2008.2011972 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Random access memory,Stability,CMOS technology,Low voltage,Error correction codes,Hardware,Power supplies,Noise reduction,Semiconductor device noise,Power measurement | Logic gate,Soft error,Leakage (electronics),Computer science,Electronic engineering,CMOS,Static random-access memory,Subthreshold conduction,Electrical engineering,Integrated circuit,Low-power electronics | Journal |
Volume | Issue | ISSN |
44 | 2 | 0018-9200 |
Citations | PageRank | References |
27 | 2.10 | 5 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ik Joon Chang | 1 | 199 | 25.32 |
| Jae-Joon Kim | 2 | 275 | 37.46 |
| Sang Phill Park | 3 | 535 | 31.56 |
| Kaushik Roy | 4 | 27 | 2.10 |