Name
Abstract | ||
|---|---|---|
This paper presents a novel low capture power test scheme integrated with EDT (Embedded Deterministic Test) environment. The key contribution of this paper is to generate test vectors that in capture mode mimic functional operation from switching activity point of view. Experimental results presented for industrial circuits demonstrate the effectiveness of the proposed method. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/TEST.2010.5699275 | ITC |
Keywords | Field | DocType |
integrated circuit testing,embedded deterministic test environment,industrial circuits,low capture power at-speed test,low capture power test scheme,switching activity | Logic gate,Computer science,Speed test,Electronic engineering,Real-time computing,Electronic circuit,Deterministic testing | Conference |
ISSN | Citations | PageRank |
1089-3539 | 1 | 0.42 |
References | Authors | |
0 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Elham Moghaddam | 1 | 79 | 7.05 |
| Janusz Rajski | 2 | 2460 | 201.28 |
| Sudhakar M. Reddy | 3 | 5747 | 699.51 |
| Xijiang Lin | 4 | 687 | 42.03 |
| Nilanjan Mukherjee | 5 | 801 | 57.26 |
| Mark Kassab | 6 | 654 | 48.74 |