Name
Abstract | ||
|---|---|---|
Error control coding (ECC) is essential for correcting soft errors in Flash memories. In such memories, as the number of erase/program cycles increases over time, the number of errors increases. In this paper we propose a flexible product code based ECC scheme that can support ECC of higher strength when needed. Specifically, we propose product codes which use Reed-Solomon (RS) codes along rows and Hamming codes along columns. When higher ECC is needed, the Hamming code along columns is replaced by two shorter Hamming codes. For instance, when the raw bit error rate increases from 2.2*10(-3) to 4.0*10(-3), the proposed ECC scheme migrates from RS(127, 121) along rows and Hamming(72,64) along columns to RS(127, 121) along rows and two Hamming(39, 32) along columns to achieve the same BER of 10(-6). While the resulting implementation has 12% higher decoding latency, it increases the lifetime of the device significantly. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/SiPS.2011.6088985 | SiPS |
Keywords | Field | DocType |
Hamming codes,NAND circuits,Reed-Solomon codes,decoding,error correction codes,error statistics,flash memories,product codes,BER,Hamming codes,MLC NAND flash memories,RS codes,Reed-Solomon codes,bit error rate,decoding latency,erase-program cycles,error control coding,flexible product code-based ECC schemes,multilevel cell,soft errors correction,Flash memories,error correction codes,multi-level cell,product codes | Hamming code,Multi-level cell,Forward error correction,Universal Product Code,Computer science,Hamming(7,4),Parallel computing,Linear code,Decoding methods,Bit error rate | Conference |
ISSN | Citations | PageRank |
1520-6130 | 2 | 0.37 |
References | Authors | |
11 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chengen Yang | 1 | 56 | 5.47 |
| Yunus Emre | 2 | 60 | 5.60 |
| Chaitali Chakrabarti | 3 | 1978 | 184.17 |
| Trevor Mudge | 4 | 6139 | 659.74 |