Name
Abstract | ||
|---|---|---|
Multiprocessor system on chip designs use complex on-chip networks to integrate different programmable processor cores, specialized memories, and other components on a single chip.MpSoCs have become the architecture of choice in many industries. Their heterogeneity inevitably increases with intellectual-property integration and component specialization. System integration is becoming a major challenge in their design.Simulation is state of the art in MpSoC performance verification, but it has conceptual disadvantages that become disabling as complexity increases. Formal approaches offer a systematic alternative. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/MC.2003.1193230 | IEEE Computer |
Keywords | DocType | Volume |
circuit CAD,integrated circuit design,multiprocessing systems,performance evaluation,MpSoC heterogeneity,MpSoC performance verification,SoC performance verification,complex on-chip networks,component specialization,intellectual property integration,multiprocessor system,programmable processor cores,specialized memories | Journal | 36 |
Issue | ISSN | Citations |
4 | 0018-9162 | 62 |
PageRank | References | Authors |
4.09 | 10 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kai Richter | 1 | 384 | 34.65 |
| Marek Jersak | 2 | 305 | 25.27 |
| Rolf Ernst | 3 | 2633 | 252.90 |