Name
Abstract | ||
|---|---|---|
This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA. From a high level description of the FPGA architecture, the basic tools such a placer, a router or an editor are automatically generated. The description is not constrained by any model, so that abstract architectures, such as virtual FPGAs, can directly exploit the tool set as their basic programming tools. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1007/3-540-44687-7_37 | FPL |
Keywords | Field | DocType |
virtual fpgas,generic fpga tool,editing virtual fpgas,basic programming tool,virtual fpga,abstract architecture,fpga architecture,high level description,basic tool | Virtual machine,Computer science,Parallel computing,Field-programmable gate array,Systolic array,Real-time computing,Exploit,Software,Logic block,Router,Seven Basic Tools of Quality,Embedded system | Conference |
ISBN | Citations | PageRank |
3-540-42499-7 | 9 | 0.78 |
References | Authors | |
5 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Loïc Lagadec | 1 | 62 | 12.84 |
| Dominique Lavenier | 2 | 463 | 48.60 |
| Erwan Fabiani | 3 | 14 | 2.50 |
| Bernard Pottier | 4 | 91 | 19.77 |