Abstract | ||
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This paper presents a new method to automatically generate hierarchical placement rules, which are crucial for a successful analog placement. The netlist, a library of building blocks and a symmetry analysis are the basis to determine a constraint requirement graph, which comprises five types of proximity, matching and symmetry constraints. According to the priority of the constraint types, a hierarchical partitioning of the circuit into matching, proximity and symmetry groups is then automatically computed and forwarded to a state-of-the-art placement tool. Based on experimental results, we show that the new approach generates more placement rules and leads to better circuit performances according to post-layout simulation compared to a commercial approach. |
Year | DOI | Venue |
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2010 | 10.1145/1735023.1735039 | ISPD |
Keywords | Field | DocType |
constraint requirement graph,commercial approach,state-of-the-art placement tool,successful analog placement,symmetry constraint,better circuit performance,automatic generation,analog integrated circuit,symmetry analysis,placement rule,hierarchical placement rule,symmetry group,placement | Netlist,Graph,Mathematical optimization,Symmetry group,Computer science,Automatic label placement,Placement,Integrated circuit | Conference |
Citations | PageRank | References |
1 | 0.34 | 9 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Michael Eick | 1 | 38 | 1.99 |
Martin Strasser | 2 | 53 | 3.11 |
Helmut E. Graeb | 3 | 269 | 36.22 |
Ulf Schlichtmann | 4 | 645 | 70.67 |