Name
Abstract | ||
|---|---|---|
Content addressable memory (CAM), a high-performance lookup engine in many systems, is so power-consuming that any saving becomes very significant in the whole system. This paper derives power models for four low-power CAMs from the fCV2 base model. CAM has three major power-sinking sources: evaluation power, input transition power and clocking power, all of them are discussed in this paper. After that, a new low-power CAM design is proposed here. Its implementation under 0.35-μm process operates at 83.3 MHz with power performance metric as 45.5 fJ/bit/search or equivalently 372 mJ/bit/search/m2 for random inputs. Two modified circuit structures for binary static CAM cells are also proposed. We have proved that under most conditions cell layout is smaller by this modification |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/ISCAS.2001.922390 | ISCAS (4) |
Keywords | Field | DocType |
0.35 micron,input transition power,evaluation power,cell layout,clocking power,high-performance lookup engine,low-power electronics,power models,content addressable memories,low-power design,integrated circuit design,cam,cellular arrays,binary static cam cells,power performance metric,content-addressable storage,83.3 mhz,parallel memories,voltage,content addressable memory,capacitance,associative memory,asynchronous transfer mode,low power electronics,computer aided manufacturing | Computer-aided manufacturing,Content-addressable memory,Computer science,Voltage,Asynchronous Transfer Mode,Electronic engineering,Integrated circuit design,Content-addressable storage,Computer hardware,Low-power electronics,Binary number | Conference |
Volume | ISBN | Citations |
4 | 0-7803-6685-9 | 23 |
PageRank | References | Authors |
2.85 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ilion Yi-liang Hsiao | 1 | 23 | 2.85 |
| Ding-hao Wang | 2 | 23 | 2.85 |
| Chein-Wei Jen | 3 | 588 | 68.52 |