Paper Info
Title
RSR: A New Rectilinear Steiner Minimum Tree Approximation for FPGA Placement and Global Routing
Abstract
This work combines FPGA placement and global routing phases in a single one, taking advantage of the interrelations between both. We have developed Rectilinear Steiner Regions (RSR), a new fast algorithm to approximate the Rectilinear Steiner Minimum Tree (RSMT) of each multiterminal net. The search of placement solutions is performed in three Simulated Annealing optimization phases, guided by different objective functions. The first one uses semiperimeter classic metric to reduce the length of the nets. The second one estimates more precisely the length of the nets with RSR algorithm. The third stage measures the congestion making a fast routing of RSR regions in each placement iteration. We have also developed an RSR-based global router. This optimization method has been applied for the placement and global routing of a set of benchmark circuits. The layouts obtained, require equal or fewer routing tracks per channel segment than those produced by other tools appeared in the literature, that only optimize the semiperimeter classic placement cost function.
Year
DOI
Venue
1998
10.1109/EURMIC.1998.711797
EUROMICRO
Keywords
Field
DocType
fast routing,placement solution,rsr region,fewer routing track,global routing,placement iteration,fpga placement,rsr algorithm,new rectilinear steiner minimum,global routing phase,tree approximation,semiperimeter classic placement cost,field programmable gate arrays,network routing,routing,objective function,simulated annealing,steiner trees,cost function
Simulated annealing,Steiner tree problem,Field-programmable gate array,Communication channel,Algorithm,Placement,Routing (electronic design automation),Router,Electronic circuit,Mathematics
Conference
Volume
ISSN
ISBN
1
1089-6503
0-8186-8646-4-1
Citations 
PageRank 
References 
3
0.49
3
Authors
3
Name
Order
Citations
PageRank
Juan de Vicente171.72
Juan Lanchares217123.30
Román Hermida38915.34