Name
Title | ||
|---|---|---|
Simulation and analysis of network on chip architecture for wireless communication system |
Abstract | ||
|---|---|---|
In this paper, analysis of NoC architecture through consideration of the characteristics of wireless communication system is introduced. In this analysis, two constraint equations are used to evaluate whether the architecture is suitable for wireless communication system. In addition, a case study that applies the IEEE 802.11a in order to estimate the required number of processors is included. According to the case study, we also simulate the minimum required frequencies and buffer sizes of switches and processors. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/IWSOC.2005.98 | IWSOC |
Keywords | Field | DocType |
noc architecture,mobile communication,minimum required frequency,wireless communication system,chip architecture,switch buffer size,required number,system-on-chip,case study,network on chip architecture,processor buffer size,buffer size,integrated circuit design,constraint equation,ieee standards,wireless lan,ieee 802.11a,network on chip,frequency,packet switching,switches,ieee 802 11a,information analysis,wireless communication,system on chip,network on a chip | Service set,Key distribution in wireless sensor networks,Wireless network,Inter-Access Point Protocol,Wireless distribution system,Computer science,Wireless WAN,Wi-Fi array,Embedded system,Base transceiver station | Conference |
ISBN | Citations | PageRank |
0-7695-2403-6 | 1 | 0.36 |
References | Authors | |
1 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sung-Rok Yoon | 1 | 7 | 2.50 |
| Sin-Chong Park | 2 | 80 | 22.58 |