| Coarse frequency offset estimation using a delayed auto-quadricorrelator in OFDM-based WLANs. | 0 | 0.34 | 2011 |
| Efficient RFID anti-collision scheme with multi-collision reflected frame request | 1 | 0.41 | 2010 |
| A Calibration Scheme For Delay Mismatch Compensation In Ofdm-Based Polar Transmitter | 0 | 0.34 | 2010 |
| A High Throughput Medium Access Control Implementation Based On Ieee 802.11e Standard | 0 | 0.34 | 2010 |
| Effect of collision on movement tracking using active RFID power measurement | 0 | 0.34 | 2010 |
| A Fast Architecture Exploration Method For High Throughput Ieee 802.11e Mac Implementation Using Systemc | 0 | 0.34 | 2010 |
| Performance Evaluation Of Rtls Based On Active Rfid Power Measurement For Dense Moving Objects | 0 | 0.34 | 2009 |
| Probabilistic Spherical Detection and VLSI Implementation for Multiple-Antenna Systems | 8 | 0.60 | 2009 |
| A hardware implementation of AGC and synchronization for OFDM-based WLAN | 0 | 0.34 | 2009 |
| A Reconfigurable Multi-Band Class E Power Amplifier Using Cmos Technology | 0 | 0.34 | 2009 |
| Mimo Detector Based On Trellis Structure | 1 | 0.38 | 2008 |
| An Efficient Admission Control Algorithm for IEEE 802.11e WLAN | 1 | 0.35 | 2008 |
| Call Admission Control Based on Adaptive Physical Rate for EDCA in IEEE 802.11e WLAN System | 0 | 0.34 | 2008 |
| A multi-processor NoC platform applied on the 802.11i TKIP cryptosystem | 2 | 0.65 | 2008 |
| Software Implementation For Multi-Protocol 13.56 Mhz Rfid Reader | 0 | 0.34 | 2008 |
| Anti-Collision Protocol Tuning For The Iso/Iec 18000-3 Mode 2 Rfid System | 0 | 0.34 | 2008 |
| A Novel Architecture of Sphere Decoder for Low Complexity and High Throughput | 1 | 0.38 | 2008 |
| Modified SDF Architecture for Mixed DIF/DIT FFT | 4 | 0.53 | 2007 |
| Timing synchronization for MIMO-OFDM WLAN systems | 0 | 0.34 | 2007 |
| Arctangent Processor Design for the Frequency Offset Estimation of IEEE 802.16D Wirelessman-OFDM System | 0 | 0.34 | 2007 |
| MIMO Detector Based on Viterbi Algorithm | 0 | 0.34 | 2007 |
| Instruction Based Synthesizable Testbench Architecture | 2 | 0.74 | 2006 |
| A pipelined VLSI architecture for a list sphere decoder | 8 | 0.84 | 2006 |
| Low Latency And Memory Efficient Viterbi Decoder Using Modified State-Mapping Method | 0 | 0.34 | 2006 |
| Efficient probabilistic sphere decoding architecture | 0 | 0.34 | 2006 |
| Cut-Off Rate Of Multiple Antenna Systems Over Frequency-Flat, Fast Fading Channels | 0 | 0.34 | 2006 |
| Probabilistic List Sphere Decoding for LDPC-Coded MIMO-OFDM Systems | 0 | 0.34 | 2006 |
| Accelerating Verification with Reusable Testbench | 0 | 0.34 | 2006 |
| Transaction Level Analysis Of Noc Based Coded Mimo-Ofdm Receiver | 1 | 0.36 | 2006 |
| Implementation Issues of a List Sphere Decoder | 4 | 0.48 | 2006 |
| Performance evaluation of enhanced distributed contention control (EDCC) mechanism in IEEE 802.11e. | 2 | 0.44 | 2005 |
| Methodology of High-Level Transaction Level Modeling Using 802.11 PHY Example | 2 | 0.49 | 2005 |
| Bluetooth security implementation based on software oriented hardware-software partition | 1 | 0.38 | 2005 |
| Transaction level modeling of IEEE 802.11 system | 1 | 0.37 | 2005 |
| Instruction Based Testbench Architecture, invited | 0 | 0.34 | 2005 |
| Analysis of throughput and efficient block size based polling scheme for IEEE 802.11e wireless LANs. | 3 | 0.45 | 2005 |
| Efficient pattern-based emulation for IEEE 802.11a baseband | 0 | 0.34 | 2005 |
| An Effective Polling Scheme For Ieee 802.11e | 8 | 0.58 | 2005 |
| Architecture for Multi-processor SoC Platform Using Dedicated Channels | 0 | 0.34 | 2005 |
| Transaction Analysis of Multiprocessor Based Platform with Bus Matrix | 0 | 0.34 | 2005 |
| Effective co-verification of IEEE 802.11a MAC/PHY combining emulation and simulation technology | 0 | 0.34 | 2005 |
| Throughput Analysis Of Ieee 802.11e Wireless Lans And Efficient Block Ack Mechanism | 8 | 1.03 | 2005 |
| Simulation and analysis of network on chip architecture for wireless communication system | 1 | 0.36 | 2005 |
| Low latency and power efficient VD using register exchanged state-mapping algorithm | 0 | 0.34 | 2005 |
| Orthogonalized communication architecture for MP-SoC with global bus | 1 | 0.37 | 2005 |
| Expurgated sphere bound for LDPC | 0 | 0.34 | 2004 |
| An Expurgated Union Bound for Space-Time Code Systems | 1 | 0.35 | 2004 |
| Design and performance analysis of the MC-CDMA | 1 | 0.52 | 2003 |
| Tightening union bound by applying Verdu theorem for LDPC | 0 | 0.34 | 2003 |
| A digital-to-analog converter based on differential-quad switching | 18 | 1.74 | 2002 |
