Name
Abstract | ||
|---|---|---|
Editor's note: Source-synchronous I/O buses, such as PCI Express and HyperTransport, are difficult to test with synchronous ATE. This article describes source-synchronous driver and receiver test modules that are tailored for these buses and that have the additional advantage of supporting jitter injection. --Scott Davidson, Sun Microsystems |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/MDT.2006.23 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
field buses,logic testing,DUT test requirement optimization,HyperTransport bus,PCI Express bus,digitally synthesized jitter injection technique,jitter tolerance testing,multigigahertz multilane digital device testing,receiver test module,source-synchronous I/O buses,source-synchronous testing,test system hardware customization,true-differential driver module,control structure reliability,fault tolerance,jitter injection,jitter-tolerance testing,multi-gigahertz testing,picosecond timing accuracy,testing | Gigabit,Computer science,Communication channel,Electronic engineering,Fault tolerance,PCI Express,Source-synchronous,Jitter,Modular design,HyperTransport,Embedded system | Journal |
Volume | Issue | ISSN |
23 | 1 | 0740-7475 |
Citations | PageRank | References |
7 | 0.87 | 7 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| David C. Keezer | 1 | 68 | 17.00 |
| Dany Minier | 2 | 28 | 4.32 |
| Patrice Ducharme | 3 | 19 | 2.65 |