Title
Characterization Techniques for High Speed Oversampled Data Converters.
Abstract
Bench characterization of wide band oversampled converters is a challenge due to the high data rate at the output of the modulator. We propose the use of a duobinary test interface to extend the frequency range over which reliable laboratory measurements become possible. We show that using such an interface effectively randomizes the modulator output data and reduces high frequency content, thereby reducing the bandwidth demands made on the test equipment. It also reduces degradation of the modulator performance caused by package feedthrough effects. Experimental results from a test chip in 90 nm CMOS show that the proposed interface extends the upper sampling frequency limit of an existing single-bit CTDSM from 3.6 GHz to 4.4 GHz.
Year
DOI
Venue
2014
10.1109/TCSI.2014.2309895
IEEE Trans. on Circuits and Systems
Keywords
Field
DocType
CMOS digital integrated circuits,analogue-digital conversion,test equipment,CMOS process,analog-digital conversion,duobinary test interface,frequency 3.6 GHz to 4.4 GHz,high data rate,high frequency content reduction,high speed oversampled data converter characterization techniques,modulator output data,package feedthrough effects,single-bit CTDSM,size 90 nm,test chip,test equipment,wideband oversampled converters,Analog-digital (A/D) conversion,bandwidth,delta sigma,duobinary coding,high speed integrated circuit measurement,oscilloscope,oversampling,partial response signalling
Test equipment,Sampling (signal processing),Converters,CMOS,Electronic engineering,Chip,Modulation,Bandwidth (signal processing),Electrical engineering,Mathematics,Feedthrough
Journal
Volume
Issue
ISSN
61-I
5
1549-8328
Citations 
PageRank 
References 
0
0.34
0
Authors
2
Name
Order
Citations
PageRank
Ankesh Jain1114.64
Shanthi Pavan239187.81