Name
Title | ||
|---|---|---|
Creation of ESL power models for communication architectures using automatic calibration |
Abstract | ||
|---|---|---|
Power consumption is an important factor in chip design. The fundamental design decisions drawn during early design space exploration at electronic system level (ESL) have a large impact on the power consumption. This requires to estimate power already at ESL, which is usually not possible using standard ESL component libraries due to missing power models. This work proposes a methodology that allows extension of ESL models with a power model and to automatically calibrate it to match a power trace obtained by gate-level simulation or measurements. Two case studies show that the methodology is suitable even for complex communication architectures. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1145/2463209.2488804 | DAC |
Keywords | Field | DocType |
standard esl component library,calibration,power consumption,integrated circuit modelling,power trace,esl model,electronic system level,automatic calibration,power model,low-power electronics,esl power model,design space exploration,case study,complex communication architecture,gate level simulation,missing power model,power estimation,integrated circuit design,chip design,fundamental design decision,early design space exploration,low power electronics | Power optimization,Computer science,Electronic system-level design and verification,Power model,Electronic engineering,Integrated circuit design,Design space exploration,Computer engineering,Calibration,Low-power electronics,Power consumption | Conference |
ISSN | Citations | PageRank |
0738-100X | 18 | 0.89 |
References | Authors | |
11 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Stefan Schürmans | 1 | 43 | 4.76 |
| Diandian Zhang | 2 | 67 | 5.08 |
| Dominik Auras | 3 | 74 | 8.25 |
| Rainer Leupers | 4 | 1389 | 136.48 |
| Gerd Ascheid | 5 | 1205 | 144.76 |
| Xiaotao Chen | 6 | 35 | 3.30 |
| Lun Wang | 7 | 18 | 0.89 |