Title
Embedded floating-point units in FPGAs
Abstract
Due to their generic and highly programmable nature, FPGAs provide the ability to implement a wide range of applications. However, it is this nonspecific nature that has limited the use of FPGAs in scientific applications that require floating-point arithmetic. Even simple floating-point operations consume a large amount of computational resources. In this paper, we introduce embedding floating-point multiply-add units in an island style FPGA. This has shown to have an average area savings of 55.0% and an average increase of 40.7% in clock rate over existing architectures.
Year
DOI
Venue
2006
10.1145/1117201.1117204
FPGA
Keywords
Field
DocType
nonspecific nature,floating-point arithmetic,floating-point unit,island style fpga,programmable nature,computational resource,simple floating-point operation,average area saving,clock rate,average increase,floating-point multiply-add unit,floating point,floating point arithmetic,fpga,floating point unit,fpu
Embedding,Floating-point unit,Floating point,Computer science,Parallel computing,Double-precision floating-point format,Field-programmable gate array,Fpga architecture,Computer hardware,Clock rate,Embedded system
Conference
ISBN
Citations 
PageRank 
1-59593-292-5
28
2.59
References 
Authors
11
4
Name
Order
Citations
PageRank
Michael J. Beauchamp1775.53
Scott Hauck22539232.71
Keith D. Underwood384777.39
K. Scott Hemmert457750.62