Title
Computational bit-width allocation for operations in vector calculus
Abstract
Automated bit-width allocation is a key step required for the design of hardware accelerators. The use of computational methods based on SAT-Modulo Theory to the problem of finite-precision bit-width allocation has recently been shown to overcome challenges faced by the known-art, particularly in the scientific computing domain. However, many such real-life applications are specified in terms of vectors and matrices and they are rendered infeasible by expansion into scalar equations. This paper proposes a framework to include operations from vector calculus and thus it enables tackling applications of practically relevant complexity.
Year
DOI
Venue
2009
10.1109/ICCD.2009.5413121
ICCD
Keywords
Field
DocType
formal logic,resource allocation,SAT modulo theory,automated bit-width allocation,computational bit-width allocation,finite precision bit-width allocation,hardware accelerators,scalar equations,scientific computing domain,vector calculus,Bit-width allocation,hardware accelerators
Resource management,Matrix (mathematics),Computer science,Parallel computing,Scalar (physics),Vector calculus,Theoretical computer science,Resource allocation
Conference
ISSN
Citations 
PageRank 
1063-6404
2
0.38
References 
Authors
9
2
Name
Order
Citations
PageRank
Adam B. Kinsman114110.05
Nicola Nicolici280759.91