Title
Parallelization of Control Recurrences for ILP Processors.
Abstract
The performance of applications executing on processors with instruction level parallelism is often limited by control and data dependences. Performance bottlenecks caused by dependences can frequently be eliminated through transformations which reduce the height of critical paths through the program. The utility of these techniques can be demonstrated in an increasingly broad range of important situations. This paper focuses on the height reduction of control recurrences within loops with data dependent exits. Loops with exits are transformed so as to alleviate performance bottlenecks resulting from control dependences. A compilation approach to effect these transformations is described. The techniques presented in this paper used in combination with prior work on reducing the height of data dependences provide a comprehensive approach to accelerating loops with conditional exits. In many cases, loops with conditional exits provide a degree of parallelism traditionally associated with vectorization. Multiple iterations of a loop can be retired in a single cycle on a processor with adequate instruction level parallelism with no cost in code redundancy. In more difficult cases, height reduction requires redundant computation or may not be feasible.
Year
DOI
Venue
1996
10.1007/BF03356743
International Journal of Parallel Programming
Keywords
Field
DocType
control dependences,recurrences,parallelism,control height reduction,back-substitution,blocked back-substitution,software pipeline,loop optimization
Instruction-level parallelism,Bottleneck,Degree of parallelism,Computer science,Parallel computing,Vectorization (mathematics),Loop optimization,Theoretical computer science,Critical path method,Computational complexity theory,Computation
Journal
Volume
Issue
ISSN
24
1
1573-7640
Citations 
PageRank 
References 
2
0.46
14
Authors
3
Name
Order
Citations
PageRank
Michael S. Schlansker137243.35
Vinod Kathail234035.85
Sadun Anik3939.41