Title
An Effective Programmable Memory Bist For Embedded Memory
Abstract
This paper proposes a micro-code based Programmable Memory BIST (PMBIST) architecture that can support various kinds of test algorithms. The proposed Non-linear PMBIST (NPMBIST.) guarantees high flexibility and high fault coverage using not only March algorithms but also non-linear algorithms such as Walking and Galloping. This NPMBIST has an optimized hardware overhead, since algorithms can be implemented with the minimum bits by the optimized instructions. Finally, various and complex algorithms can be run thanks to its support of multi-loop.
Year
DOI
Venue
2009
10.1587/transinf.E92.D.2508
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS
Keywords
Field
DocType
Programmable BIST, test algorithm, multi-loop
Fault coverage,Test algorithm,Computer science,Coding (social sciences),Out-of-core algorithm,Embedded system,Built-in self-test,Embedded memory
Journal
Volume
Issue
ISSN
E92D
12
1745-1361
Citations 
PageRank 
References 
5
0.52
2
Authors
4
Name
Order
Citations
PageRank
Youngkyu Park1293.51
Jaeseok Park2196.05
Taewoo Han3798.41
Sungho Kang443678.44