Abstract | ||
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An increasing demand for higher performance, for lower power density, and for greatly expanded functionalities will determine radical changes in the future computing architectures. These widely acknowledged emerging trends are however insufficient to address all the challenges introduced by advanced silicon nanometer technologies. It is well known that manufacturability for high yield, along with design productivity and predictability and system reconfigurability for reduced NRE costs and faster time-to-market, are major problems in gigascale SoC design. Therefore, only focusing the design efforts on performance, power consumption, and throughput can hinder the potentials of the new computing architectures and limit the silicon yield. In this paper, we introduce an innovative architecture-to-silicon platform that by exploiting the concept of regularity at different levels of abstraction addresses the emerging challenges for the new computing architectures, and links system and architecture definition with silicon fabrication. |
Year | DOI | Venue |
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2007 | 10.1109/VLSISOC.2007.4402484 | VLSI-SOC 2007: PROCEEDINGS OF THE 2007 IFIP WG 10.5 INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION |
Keywords | Field | DocType |
throughput,computer architecture,productivity,computer aided manufacturing,power density,high performance computing,software design,silicon | Computer-aided manufacturing,Computer architecture,Software design,Reconfigurability,Supercomputer,Engineering,Throughput,Time to market,Design for manufacturability,Energy consumption,Embedded system | Conference |
Citations | PageRank | References |
3 | 0.43 | 3 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Davide Pandini | 1 | 94 | 15.76 |
Giuseppe Desoli | 2 | 389 | 41.91 |
Alessandro Cremonesi | 3 | 3 | 0.43 |