Title
A freespace crossbar for multi-core processors
Abstract
A new package-level interconnect is described that adapts carbon nanoemissive display technology to create an inexpensive package-level freespace crossbar with single-cycle source-to-target latency. Interconnections are made using filamentary electron beams as the data transmission medium. The beams are electrostatically steered, enabling very large, low latency inter-chip crossbar networks. The crossbar and associated package are built entirely from existing technology. This paper describes the operation of the crossbar and presents a conceptual design for a processor that uses the crossbar.
Year
DOI
Venue
2008
10.1145/1375527.1375539
I4CS
Keywords
Field
DocType
filamentary electron beam,inexpensive package-level freespace crossbar,associated package,adapts carbon nanoemissive display,single-cycle source-to-target latency,new package-level,low latency inter-chip crossbar,conceptual design,multi-core processor,data transmission medium,multi core processor,interconnect,data transmission,chip,electron beam,low latency
Conceptual design,Data transmission,Computer science,Latency (engineering),Parallel computing,Latency (engineering),Interconnection,Multi-core processor,Crossbar switch
Conference
Citations 
PageRank 
References 
0
0.34
2
Authors
3
Name
Order
Citations
PageRank
Michel N. Victor100.34
Aris K. Silzars200.34
Edward S. Davidson3922171.30