Name
Abstract | ||
|---|---|---|
This paper proposes a new cost-effective solution for jitter testing. It measures timing jitter using a combination of voltage comparators in the pin electronics as a 1.6-bit ADC, and digital signal processing. It has been verified experimentally to be more than 96% accurate. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/TEST.2006.297654 | 2006 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2 |
Keywords | Field | DocType |
cost effectiveness,digital signal processing | Comparators circuits,Digital signal processing,Comparator,Computer science,Digital signal,Voltage,Automatic testing,Real-time computing,Electronic engineering,Electronics,Jitter,Computer hardware | Conference |
ISSN | Citations | PageRank |
1089-3539 | 3 | 0.57 |
References | Authors | |
6 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Takahiro J. Yamaguchi | 1 | 176 | 35.24 |
| Satoshi Iwamoto | 2 | 3 | 0.57 |
| Masahiro Ishida | 3 | 105 | 22.58 |
| Mani Soma | 4 | 497 | 73.41 |