Paper Info
Title
A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases
Abstract
Recently, a method called pipeline stage unification (PSU) has been proposed to reduce energy consumption for mobile processors via inactivating and bypassing some of the pipeline registers and thus adopt shallow pipelines. It is designed to be an energy efficient method especially for the processors under future process technologies. In this paper, we present a mechanism for the PSU controller which can dynamically predict a suitable configuration based on the program phase detection. Our results show that the designed predictor can achieve a PSU degree prediction accuracy of 84.0%, averaged from the SPEC CPU2000 integer benchmarks. With this dynamic control mechanism, we can obtain 11.4% Energy-Delay-Product (EDP) reduction in the processor that adopts a PSU pipeline, compared to the baseline processor, even after the application of complex clock gating.
Year
DOI
Venue
2008
10.1093/ietisy/e91-d.4.1010
IEICE Transactions
Keywords
Field
DocType
dynamic control mechanism,pipeline stage unifica- tion,energy consumption,pipeline stage unification,gating. key words: energy saving,psu controller,energy efficient method,identifying program phases,pipeline register,psu degree prediction accuracy,program phase,shallow pipeline,baseline processor,psu pipeline,dynamic optimization,energy efficient
Computer science,Artificial intelligence,Low-power electronics,Computer vision,Dynamic programming,Clock gating,Pipeline transport,Control theory,Simulation,Efficient energy use,Parallel computing,Mobile processor,Energy consumption
Journal
Volume
Issue
ISSN
E91-D
4
1745-1361
Citations 
PageRank 
References 
3
0.52
14
Authors
4
Name
Order
Citations
PageRank
Jun Yao139547.98
Shinobu Miwa22813.09
Hajime Shimada3364.76
Shinji Tomita414936.23