Title | ||
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Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures |
Abstract | ||
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In this contribution we apply a novel strategy for partial remapping to significantly enhance the reliability of coarse-grained reconfigurable architectures. If a component of the architecture is affected by a permanent error, it will be deactivated and the architecture is reconfigured to relinquish the concerned resource. This is achieved by spatially moving operations from defective to unused components. If no unused component is available, operations are additionally moved within time domain to free the required resources. In our experiments, we regard the failure of each single component in an array of processing elements. Depending on the resource usage of the application, between 70% and 100% of the defects can be tolerated. In average, the repair of one failure takes 36 seconds, and the clock frequency has to be reduced by just 0.8% to enable the execution of the changed application mapping. |
Year | DOI | Venue |
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2011 | 10.1109/DFT.2011.7 | DFT |
Keywords | Field | DocType |
fault-tolerant coarse-grained reconfigurable architectures,clock frequency,single component,concerned resource,partial remapping,required resource,temporal data path remapping,changed application mapping,novel strategy,resource usage,coarse-grained reconfigurable architecture,unused component,fault tolerance,temporal data,time domain,vlsi,fault tolerant | Time domain,Computer architecture,Architecture,Computer science,Real-time computing,Fault tolerance,Temporal database,Very-large-scale integration,Clock rate | Conference |
ISSN | Citations | PageRank |
1550-5774 | 6 | 0.55 |
References | Authors | |
7 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sven Eisenhardt | 1 | 36 | 4.54 |
Anja Kuster | 2 | 13 | 1.07 |
Thomas Schweizer | 3 | 74 | 10.73 |
Tommy Kuhn | 4 | 51 | 6.75 |
Wolfgang Rosenstiel | 5 | 1462 | 212.32 |