Abstract | ||
---|---|---|
In 0.35-micron standard-cell CMOS technology, this IC core design supports a data rate of up to 400 Mbps and includes circuit blocks that operate at a clock frequency of 400 MHz |
Year | DOI | Venue |
---|---|---|
2000 | 10.1109/54.867900 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
Circuit CAD,Computer interfaces,IEEE standards,IC core design,IEEE 1394-compliant,reusable IC core | Power optimization,Computer science,CMOS,Electronic engineering,Data rate,Computer engineering,IEEE 1394,Clock rate | Journal |
Volume | Issue | ISSN |
17 | 3 | 0740-7475 |
Citations | PageRank | References |
4 | 0.59 | 0 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Mauro Bertacchi | 1 | 4 | 0.59 |
Alessandro De Gloria | 2 | 570 | 77.54 |
Daniele Grosso | 3 | 4 | 0.59 |
Mauro Olivieri | 4 | 385 | 36.09 |