Title
IDD Waveforms Analysis for Testing of Domino and Low Voltage Static CMOS Circuits
Abstract
This paper describes a test method which relies on the actual observation of supply current (IDD) waveforms. The method can be used to supplement the standard IDDQ test method and it can be easily applied to dynamic and low VDD, low Vt CMOS circuits. The method allows us to detect faults which may not be detected by IDDQ test methods, and is sensitive enough to detect potential faults, which do not manifest themselves as functional errors. A simple built-in current sensor, which proves to be adequate in verifying the feasibility of using the IDD waveforms analysis is proposed to safely observe the current waveforms without significantly changing the waveforms.
Year
DOI
Venue
1998
10.1109/GLSV.1998.665243
Great Lakes Symposium on VLSI
Keywords
DocType
ISSN
CMOS logic circuits,automatic testing,fault diagnosis,integrated circuit testing,logic testing,waveform analysis,IDD waveforms analysis,built-in current sensor,domino circuits,feasibility,functional errors,low voltage circuits,potential faults,static CMOS circuits,supply current waveforms
Conference
1066-1395
ISBN
Citations 
PageRank 
0-8186-8409-7
2
0.52
References 
Authors
0
3
Name
Order
Citations
PageRank
hendrawan soeleman125862.61
Dinesh Somasekhar223144.52
Kaushik Roy37093822.19