Name
Title | ||
|---|---|---|
A fast power current analysis methodology using capacitor charging model for side channel attack evaluation. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/HST.2011.5955002 | HOST |
Keywords | Field | DocType |
CMOS integrated circuits,cryptography,large scale integration,CMOS standard cell library,LSI chip,advanced encryption standard,capacitor charging model,correlation power analysis,cryptographic hardware,fast power current analysis,side channel attack evaluation | Capacitor,Advanced Encryption Standard,Computer science,Semiconductor device modeling,Chip,Electronic engineering,CMOS,Standard cell,Side channel attack,Transistor,Electrical engineering | Conference |
Citations | PageRank | References |
4 | 0.50 | 4 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Daisuke Fujimoto | 1 | 25 | 6.52 |
| Makoto Nagata | 2 | 285 | 76.47 |
| Toshihiro Katashita | 3 | 128 | 12.53 |
| Akihiro T. Sasaki | 4 | 4 | 0.50 |
| Yohei Hori | 5 | 98 | 10.17 |
| Akashi Satoh | 6 | 866 | 69.99 |