Title
Low-power floating bitline 8-T SRAM design with write assistant circuits
Year
DOI
Venue
2008
10.1109/SOCC.2008.4641519
SoCC
Keywords
Field
DocType
CMOS memory circuits,SRAM chips,integrated circuit design,low-power electronics,CMOS technology,SoC design,low power SRAM,low-power floating bitline 8-T SRAM design,low-power floating bitline read/write scheme,read/write replica circuits,wide-voltage range operations,write assistant circuits
Replica,Computer science,Static random-access memory,CMOS,Electronic engineering,Integrated circuit design,Electronic circuit,Computer hardware,Low-power electronics
Conference
Citations 
PageRank 
References 
1
0.38
3
Authors
3
Name
Order
Citations
PageRank
Hao-i Yang1416.20
Ssu-yun Lai210.38
Wei Hwang325444.40