Name
Abstract | ||
|---|---|---|
In this paper a modification of the Hsiao SEC-DED (Single Error Correction, Double Error Detection) code is presented. The proposed code is still a SEC-DED code, but it is also able to correct a byte erasure. This code has been developed to protect the memory chips of a spaceborne computer against SEU (Single Event Upset) and SEFI (Single Event Functional Interruption) faults. The code rate of our proposed code is the same of the Hsiao code and is particularly suitable for byte organized 64-bits memory systems. In fact, for these systems a (72,64) code can be constructed and a memory organization based on nine chips can be designed. The byte erasure correction allows to tolerate the occurrence of a SEFI fault in one of the memory chips without data loss. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/DFT.2009.8 | DFT |
Keywords | DocType | ISSN |
64-bits memory system,single error correction,sefi tolerant memory,single event functional interruption,single event,memory organization,hsiao code,proposed code,error correction codes,memory chip,code rate,sec-ded code,error detection,fault tolerance,error correction,chip,error correction code,data mining,bit error rate | Conference | 1550-5774 |
Citations | PageRank | References |
1 | 0.38 | 5 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Salvatore Pontarelli | 1 | 368 | 54.05 |
| G. C. Cardarilli | 2 | 71 | 10.34 |
| Marco Re | 3 | 194 | 35.03 |
| A. Salsano | 4 | 90 | 13.37 |