Paper Info
Title
An Architecture for Reconfigurable Multi-core Explorations
Abstract
Multi-core systems are now the norm, and reconfigurable systems have shown substantial benefits over general purpose ones. This paper presents a combination of the two: a fully featured reconfigurable multi-core processor based on the Leon3 processor. The platform has important features like cache coherency, a fully running modern OS (GNU/Linux) and each core has a tightly coupled reconfigurable coprocessor unit attached. This allows the SPARC instruction set to be extended for the running application. The multi-core reconfigurable processor architecture, including the coprocessor interface, the ICAP controller and the Linux kernel driver, is presented. The experimental results show the characteristics of the platform including: area costs, the memory contention, the reprogramming cost... Speedups up to 100x are demonstrated on a cryptography test.
Year
DOI
Venue
2011
10.1109/ReConFig.2011.10
ReConFig
Keywords
Field
DocType
reconfigurable multi-core processor,reconfigurable system,sparc instruction,reconfigurable coprocessor unit,multi-core system,icap controller,coprocessor interface,multi-core reconfigurable processor architecture,reconfigurable multi-core explorations,leon3 processor,linux kernel driver,pipelines,encryption,multi core,cache coherence,multicore processing,coprocessors,multi core processor,kernel,linux
Control theory,Instruction set,Computer science,Parallel computing,Encryption,Coprocessor,Multi-core processor,Operating system,Microarchitecture,Linux kernel,Cache coherence
Conference
Citations 
PageRank 
References 
3
0.40
6
Authors
3
Name
Order
Citations
PageRank
Olivier Serres1657.52
Vikram K. Narayana210213.18
Tarek El-Ghazawi342744.88