Name
Affiliation
Papers
TAREK EL-GHAZAWI
The George Washington University, Washington, DC, USA
72
Collaborators
Citations 
PageRank 
109
427
44.88
Referers 
Referees 
References 
1099
1168
634
Search Limit
1001000
Title
Citations
PageRank
Year
A Deep Neural Network Accelerator using Residue Arithmetic in a Hybrid Optoelectronic System00.342022
iSample: Intelligent Client Sampling in Federated Learning00.342022
Adaptive and Efficient Resource Allocation in Cloud Datacenters Using Actor-Critic Deep Reinforcement Learning00.342022
ReCPE: A PE for Reconfigurable Lightweight Cryptography10.382021
A Machine-Learning-Based Framework for Productive Locality Exploitation00.342021
Virtualizing Analog Mesh Computers: The Case of a Photonic PDE Solving Accelerator00.342020
Software stack for an analog mesh computer: the case of a nanophotonic PDE accelerator00.342020
Photonic Processor for Fully Discretized Neural Networks00.342019
Can Photonic Computing be the Answer to Green and Sustainable Computing?00.342019
LAPPS: Locality-Aware Productive Prefetching Support for PGAS.00.342018
HyPPI NoC: Bringing Hybrid Plasmonics to an Opto-Electronic Network-on-Chip00.342017
Reordering GPU Kernel Launches to Enable Efficient Concurrent Execution10.352015
Adaptive Cache Coherence Mechanisms with Producer–Consumer Sharing Optimization for Chip Multiprocessors30.412015
Bandwidth Adaptive Cache Coherence Optimizations for Chip Multiprocessors00.342014
An Adaptive Hybrid OLAP Architecture with optimized memory access patterns50.462013
Application-specific processors for web-browsing: An exploration and evaluation of the design space20.362013
Accelerated high-performance computing through efficient multi-process GPU resource sharing10.342012
Distributed Shared Memory Programming in the Cloud10.352012
A convolve-and-merge approach for exact computations on high-performance reconfigurable computers00.342012
Bandwidth Adaptive Write-update Optimizations for Chip Multiprocessors10.352012
Task Scheduling for GPU Accelerated Hybrid OLAP Systems with Multi-core Support and Text-to-Integer Translation40.422012
Productivity of GPUs under different programming paradigms80.772012
Efficient Mapping of Task Graphs onto Reconfigurable Hardware Using Architectural Variants90.492012
A Compartive Study of Cloud Computing Middleware00.342012
Towards efficient GPU sharing on multicore processors70.612012
Exploiting Hierarchical Parallelism Using UPC10.362011
A Static Task Scheduling Framework for Independent Tasks Accelerated Using a Shared Graphics Processing Unit60.522011
An Architecture for Reconfigurable Multi-core Explorations30.402011
New Hardware Architectures for Montgomery Modular Multiplication Algorithm331.822011
GPU Resource Sharing and Virtualization on High Performance Computing Systems191.072011
Task scheduling for GPU accelerated OLAP systems10.362011
A Framework for Evaluating High-Level Design Methodologies for High-Performance Reconfigurable Computers40.522011
Scaling scientific applications on clusters of hybrid multicore/GPU nodes80.972011
Modelling the performance of an SSD-Aware storage system using least squares regression10.362011
Reflex Barrier: A Scalable Network-Based Synchronization Barrier00.342011
Reconfiguration and Communication-Aware Task Scheduling for High-Performance Reconfigurable Computing180.742010
Efficient cache design for solid-state drives40.482010
An adaptive cache coherence protocol for chip multiprocessors40.392010
Parameterized hardware design on reconfigurable computers: an image processing case study30.472010
Space and time sharing of reconfigurable hardware for accelerated parallel processing10.372010
RDMS: A hardware task scheduling algorithm for Reconfigurable Computing80.672009
Performance issues in emerging homogeneous multi-core architectures100.622009
Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants30.412009
Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing261.582009
Performance Evaluation of Clusters with ccNUMA Nodes - A Case Study50.472008
Portable library development for reconfigurable computing systems: A case study40.492008
An optimized hardware architecture for the montgomery multiplication algorithm171.412008
Extreme parallel architectures for the masses00.342008
Application Performance Tuning for Clusters with ccNUMA Nodes50.612008
DNA and Protein Sequence Alignment with High Performance Reconfigurable Systems50.482007
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