Title
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking
Abstract
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we present a novel configuration locking technique to reduce the effect of the overhead. The idea is to at run-time lock a number of the most frequently used tasks on the configuration memory so that they cannot be evicted by other tasks. With real applications in validation, the results show that using proper amount of resources to lock tasks can significantly outperform simply using more resources. In addition, an algorithm has been developed for estimating the lock ratio. Experimental results show that the estimates are close to optimal results and the measured computer runtime is less than 4 us in a commercial embedded processor.
Year
DOI
Venue
2008
10.1109/DATE.2008.4484894
Munich
Keywords
Field
DocType
lock ratio estimation,lock ratio,run time reconfigurable device,measured computer runtime,novel configuration,configuration memory,configuration overhead,commercial embedded processor,system-on-chip,logic design,integrated circuit design,proper amount,run-time reconfigurable logic,attractive alterative,embedded systems,run time reconfigurable devices,soc design,configuration locking,embedded system,embedded processor,application software,system performance,hardware acceleration,system on chip,embedded computing,degradation
Logic synthesis,Double-checked locking,System on a chip,Computer science,Lock (computer science),Parallel computing,Real-time computing,Integrated circuit design,Hardware acceleration,Embedded system
Conference
ISSN
ISBN
Citations 
1530-1591
978-3-9810801-4-8
3
PageRank 
References 
Authors
0.46
5
3
Name
Order
Citations
PageRank
Yang Qu110310.67
Juha-Pekka Soininen214723.41
Jari Nurmi355683.87