Title | ||
---|---|---|
A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm. |
Year | DOI | Venue |
---|---|---|
2010 | 10.1109/ISSCC.2010.5433906 | ISSCC |
Keywords | Field | DocType |
DRAM chips,audio coding,microprocessor chips,video coding,H.264 video decoder,full-HD decoding application processor,mobile application processor,power 222 mW,power switch circuits,rush current,size 40 nm,stacked DRAM,video-audio multiprocessor | Dram,Video processing,Power domains,High memory,Computer science,Chip,Bandwidth (signal processing),Software,Computer hardware,Memory rank,Embedded system | Conference |
Citations | PageRank | References |
9 | 2.32 | 3 |
Authors | ||
14 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yu Kikuchi | 1 | 21 | 3.07 |
Makoto Takahashi | 2 | 30 | 4.55 |
Tomohisa Maeda | 3 | 21 | 3.07 |
Hiroyuki Hara | 4 | 67 | 7.06 |
Hideho Arakida | 5 | 51 | 8.53 |
Hideaki Yamamoto | 6 | 21 | 3.07 |
Yousuke Hagiwara | 7 | 21 | 3.41 |
Tetsuya Fujita | 8 | 62 | 14.04 |
Manabu Watanabe | 9 | 21 | 3.07 |
Takayoshi Shimazawa | 10 | 37 | 11.55 |
Yasuo Ohara | 11 | 29 | 4.60 |
Takashi Miyamori | 12 | 132 | 16.58 |
Mototsugu Hamada | 13 | 130 | 22.06 |
Yukihito Oowaki | 14 | 38 | 6.51 |