Name
Abstract | ||
|---|---|---|
In this paper, we present a novel algorithm and the corresponding architecture for performing range reduction, which is a preprocessing task required for the evaluation of some elementary functions such as trigonometric and exponential-based functions. The proposed algorithm introduces a modification to the Modular Range Reduction algorithm which increases the speed of computation and allows us to design an architecture for the floating-point case. The implementation presented admits as an input argument any representable number of the standard single precision IEEE 754 floating-point representation and provides the maximum accuracy to the final result. This supposes a hardware solution to the problem of having an input argument close to a multiple of the constant. A final comparison with other implementations is presented. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/TC.2006.38 | IEEE Trans. Computers |
Keywords | Field | DocType |
final comparison,floating-point hardware implementations,input argument,floating-point case,final result,modular range reduction algorithm,corresponding architecture,novel algorithm,floating-point representation,proposed algorithm,double-residue modular range reduction,input argument close,computer architecture,floating point arithmetic,hardware,algorithm design and analysis,trigonometric functions,elementary functions,floating point,frequency | Single-precision floating-point format,Floating point,Computer science,Floating-point unit,Double-precision floating-point format,Parallel computing,Arithmetic,Computational science,Minifloat,Modular design,IEEE floating point,Extended precision | Journal |
Volume | Issue | ISSN |
55 | 3 | 0018-9340 |
Citations | PageRank | References |
6 | 0.74 | 4 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Julio Villalba | 1 | 219 | 23.56 |
| Tomás Lang | 2 | 417 | 73.70 |
| Mario A. González | 3 | 9 | 1.54 |