Title
An adaptive pam-4 5-Gb/s backplane transceiver in 0.25-μm CMOS
Abstract
This paper describes a backplane transceiver, which uses pulse amplitude modulated four-level (PAM-4) signaling and continuously adaptive transmit-based equalization to move 2.5-GBd/s symbols totalling 5 Gb/s across typical FR-4 backplanes for total distances of up to 50 inches through two sets of backplane connectors. The 17-mm2 device is implemented in a 0.25-μm CMOS process, operates off of 2.5...
Year
DOI
Venue
2003
10.1109/JSSC.2002.808282
IEEE Journal of Solid-State Circuits
Keywords
DocType
Volume
Backplanes,Transceivers,Pulse modulation,Adaptive equalizers,Amplitude modulation,Connectors,Dielectric losses,Circuits,Clocks,Frequency synthesizers
Journal
38
Issue
ISSN
Citations 
3
0018-9200
20
PageRank 
References 
Authors
6.01
0
16
Name
Order
Citations
PageRank
j l sonntag1338.39
John Stonick2207.70
james gorecki3276.97
bill beale4206.01
b check5206.01
xuemei gong6206.01
j guiliano7206.01
kyong lee8206.01
bob lefferts9206.01
david martin10206.01
Un-Ku Moon11836140.98
a sengir12206.01
stephen j titus13206.01
Gu-Yeon Wei141927214.15
daniel k weinlader15206.01
yaohua yang16206.01