Abstract | ||
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Code repositioning is a well-known method of reducing inefficient off-chip memory accesses by streamlining cache behavior. Embedded systems with predetermined applications can achieve further improvement with the addition of fast and energy efficient scratchpad memory (SPM) on chip and moving frequent accesses code and/or data from main memory to SPM. While many researchers have attempted to either streamline cache accesses or improve the effectiveness of SPM, few studies focus on exploring their joint synergy. This study proposes integer linear programming (ILP) models that include both code repositioning and SPM code selection to identify the optimal code layout and reduce energy consumption in embedded systems with a cache and SPM. This study also proposes a two-stage metaheuristic algorithm. Experimental results reveal that 1) allocating a dedicated portion of the on-chip SRAM to the SPM is not always better than using a cache-only configuration and 2) it is not trivial to select code objects for the SPM. As much as 55 percent additional energy can be saved by applying both code repositioning and SPM code selection techniques. |
Year | DOI | Venue |
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2012 | 10.1109/TC.2011.122 | IEEE Trans. Computers |
Keywords | Field | DocType |
power aware computing,cache storage,ilp model,frequent accesses code,code repositioning,integer programming,sram chips,spm code selection,cache access,cache behavior,linear programming,minimizing energy consumption,system-on-chip,inefficient off-chip memory access reduction,energy efficient scratchpad memory on chip,energy efficient scratchpad memory,streamline cache access,two-stage metaheuristic algorithm,code layout,energy consumption minimization,energy consumption,spm on chip,code reposition,spm code selection technique,embedded systems,integer linear programming model,code object,optimal code layout,scratchpad memory.,on-chip sram,energy efficient,mathematical model,system on chip,layout,strips,chip,embedded system,memory management | System on a chip,Computer science,Efficient energy use,Cache,Scratchpad memory,Parallel computing,Static random-access memory,Real-time computing,Integer programming,Memory management,Energy consumption,Embedded system | Journal |
Volume | Issue | ISSN |
61 | 8 | 0018-9340 |
Citations | PageRank | References |
9 | 0.60 | 11 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Chen-Wei Huang | 1 | 125 | 9.03 |
Shiao-li Tsao | 2 | 396 | 55.77 |