Title | ||
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The impact of static and dynamic degradation on SOI “smart-cut” floating body MOSFETs |
Abstract | ||
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The impact of static (DC) and dynamic (AC) degradation on SOI “smart-cut” floating body MOSFETs, was investigated by means of deep level transient spectroscopy (DLTS). The study was based on drain current signal recording, immediately after the transistor transition from OFF- to ON-state. In order to isolate the activity of capture/emission carrier mechanisms, undesirable parasitic effects such as drain current overshoot were suppressed by appropriately biasing the transistor substrates. Under DC degradation regime, DLTS spectra disclosed that carrier capture/emission process occurred through discrete traps governed by thermally activated mechanisms. Furthermore, polarization phenomena emerged. Under AC degradation regime, although the existence of interface states in Si-SiO2 interface was dominant, the revelation of shallow traps in low temperature domain was also monitored. |
Year | DOI | Venue |
---|---|---|
2005 | 10.1016/j.microrel.2005.07.027 | Microelectronics Reliability |
Field | DocType | Volume |
Silicon on insulator,Deep-level transient spectroscopy,Overshoot (signal),Degradation (geology),Electronic engineering,Engineering,MOSFET,Transistor,Ion implantation,Biasing | Journal | 45 |
Issue | ISSN | Citations |
9 | 0026-2714 | 0 |
PageRank | References | Authors |
0.34 | 2 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
M.A. Exarchos | 1 | 2 | 1.54 |
G.J. Papaioannou | 2 | 14 | 8.35 |
J. Jomaah | 3 | 6 | 3.32 |
F. Balestra | 4 | 0 | 0.34 |