Title | ||
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The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution |
Abstract | ||
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With the emergence of multicore processors, various aggressive execution models have been proposed to exploit fine-grained thread-level parallelism, taking advantage of the fast on-chip interconnection communication. However, the aggressive nature of these execution models often leads to excessive energy consumption incommensurate to execution time reduction. In the context of Thread-Level Speculation, we demonstrated that on a same-ISA heterogeneous multicore system, by dynamically deciding how on-chip resources are utilized, speculative threads can achieve performance gain in an energy-efficient way. Through a systematic design space exploration, we built a multicore architecture that integrates heterogeneous components of processing cores and first-level caches. To cope with processor reconfiguration overheads, we introduced runtime mechanisms to mitigate their impacts. To match program execution with the most energy-efficient processor configuration, the system was equipped with a dynamic resource allocation scheme that characterizes program behaviors using novel processor counters. We evaluated the proposed heterogeneous system with a diverse set of benchmark programs from SPEC CPU2000 and CPU20006 suites. Compared to the most efficient homogeneous TLS implementation, we achieved similar performance but consumed 18% less energy. Compared to the most efficient homogeneous uniprocessor running sequential programs, we improved performance by 29% and reduced energy consumption by 3.6%, which is a 42% improvement in energy-delay-squared product. |
Year | DOI | Venue |
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2013 | 10.1145/2541228.2541233 | TACO |
Keywords | Field | DocType |
excessive energy consumption incommensurate,novel processor counter,heterogeneous multicore system,various aggressive execution model,multicore architecture,energy-efficient speculative thread execution,program execution,energy-efficient processor configuration,multicore processor,execution model,heterogeneous component,execution time reduction,thread level speculation,energy efficiency | Uniprocessor system,Efficient energy use,Computer science,Parallel computing,Speculative multithreading,Thread (computing),Real-time computing,Resource allocation,Design space exploration,Energy consumption,Multi-core processor,Distributed computing | Journal |
Volume | Issue | ISSN |
10 | 4 | 1544-3566 |
Citations | PageRank | References |
2 | 0.36 | 34 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
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Yangchun Luo | 1 | 39 | 2.29 |
Wei-Chung Hsu | 2 | 719 | 58.87 |
Antonia Zhai | 3 | 459 | 23.62 |