Name
Affiliation
Papers
WEI-CHUNG HSU
Natl Chiao Tung Univ, Hsinchu, Taiwan
79
Collaborators
Citations 
PageRank 
106
719
58.87
Referers 
Referees 
References 
1358
1515
1047
Search Limit
1001000
Title
Citations
PageRank
Year
Efficient Dynamic Device Placement For Deep Neural Network Training On Heterogeneous Systems00.342019
Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator.00.342019
Improving SIMD Parallelism via Dynamic Binary Translation.20.372018
Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator00.342018
Exploring hidden coherency of Ray-Tracing for heterogeneous systems using online feedback methodology.00.342018
Efficient and retargetable SIMD translation in a dynamic binary translator.00.342018
Automatically Migrating Sequential Applications to Heterogeneous System Architecture00.342018
Adaptive runtime exploiting sparsity in tensor of deep learning neural network on heterogeneous systems00.342017
On Static Binary Translation of ARM/Thumb Mixed ISA Binaries.00.342017
Efficient Synthetic Light Field Rendering on Heterogeneous Systems Using a Pipeline-Based Runtime Design.00.342017
Optimizing Control Transfer and Memory Virtualization in Full System Emulators.10.352016
HSAemu 2.0: Full System Emulation for HSA platforms with Soft-MMU.10.352016
Exploiting Longer Simd Lanes In Dynamic Binary Translation00.342016
Building a KVM-based Hypervisor for a Heterogeneous System Architecture Compliant System.40.392016
A dynamic binary translation system in a client/server environment10.352015
Automatic validation for binary translation10.362015
Runtime techniques for efficient Ray-Tracing on heterogeneous systems30.402015
HSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines.20.382015
SIMD Code Translation in an Enhanced HQEMU60.412015
Improving SIMD code generation in QEMU50.482015
HSAemu: a full system emulator for HSA platforms40.412014
Efficient memory virtualization for Cross-ISA system mode emulation90.522014
Efficient and Retargetable Dynamic Binary Translation on Multicores30.412014
Dynamic and Adaptive Calling Context Encoding30.382014
A Retargetable Static Binary Translator for the ARM Architecture60.562014
DBILL: an efficient and retargetable dynamic binary instrumentation framework using llvm backend60.462014
Extended Instruction Exploration for Multiple-Issue Architectures00.342014
An Adaptive Heterogeneous Runtime for Irregular Applications in the Case of Ray-Tracing (Extended Abstract).00.342014
Improving dynamic binary optimization through early-exit guided code region formation70.442013
The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution20.362013
Effective code discovery for ARM/Thumb mixed ISA binaries in a static binary translator40.402013
LLBT: an LLVM-based static binary translator80.532012
An LLVM-based hybrid binary translation system30.392012
A hybrid just-in-time compiler for android: comparing JIT types and the result of cooperation40.452012
Design of communication interface and control system for intelligent humanoid robot10.382012
HQEMU: a multi-threaded and retargetable dynamic binary translator on multicores371.172012
Effectiveness of Compiler-Directed Prefetching on Data Mining Benchmarks.00.342012
PQEMU: A Parallel System Emulator Based on QEMU130.712011
Dynamic register promotion of stack variables40.452011
A method-based ahead-of-time compiler for android applications80.602011
LnQ: Building High Performance Dynamic Binary Translators with Existing Compiler Backends60.472011
Efficient and effective misaligned data access handling in a dynamic binary translation system00.342011
Energy efficient speculative threads: dynamic thread allocation in Same-ISA heterogeneous multicore systems150.572010
An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems30.402009
Exploring speculative parallelism in SPEC2006100.552009
Reducing Code Size by Graph Coloring Register Allocation and Assignment Algorithm for Mixed-Width ISA Processor00.342009
An Architecture for the Interoperability of Multimedia Messaging Services between GPRS and PHS Cellular Networks00.342007
COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications40.422007
CIM: A Reliable Metric for Evaluating Program Phase Classifications20.412007
Entropy-based profile characterization and classification for automatic profile management00.342007
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