Name
Abstract | ||
|---|---|---|
This paper proposes a new analytical approach for evaluating the effects of a repair process on the defect level of multichip module (MCM) systems during assembly, thereby identifying the optimal number of repair cycles. Repair of complex MCMs is required to improve the yield and quality of these systems, while preserving cost effectiveness. No analytical evaluation has been reported in the current technical literature. In the proposed approach, we employ a novel Markov-chain model, which is solved analytically in O(rN3) (where r is the maximum number of allowed repair cycles and N is the number of chips in the MCM). The proposed model is based on a previously proposed quality model [36] for MCMs which does not incorporate the effect of a repair process on the defect level.The proposed model effectively relates the defect level to different figures of merit of repair, such as the probability of successfully repairing a fault (referred to as repairability) and the maximum allowed number of repair cycles. Parametric results show that the overall defect level decreases as the MCM yield increases due to the repair process; however, there exists a bound in the number of repair cycles, while still permitting an increase in repairability. The bound value provides the optimal number of repair cycles.Using these results, it is possible to predict a more accurate value of the defect level of MCMs by taking into account the different parameters affecting the repair process, while realistically reducing the defect level of the final MCM product. The cost of the repair process is analyzed and an example using industrial data is provided. The validity of the proposed approach is further accomplished through extensive Monte Carlo simulation. |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1016/S1383-7621(01)00038-8 | Journal of Systems Architecture |
Keywords | Field | DocType |
overall defect level decrease,multichip module,quality-effective repair,multichip module system,mcm yield increase,quality assurance,final mcm product,novel quality model,defect level,multichip module systems,repair cycle,repair,yield,quality model,mcm yield,optimal number,repair process,maximum number,probability,chip,silicon,degradation,cost effectiveness,fabrication,very large scale integration,figure of merit,markov model,integrated circuit packaging,testing,markov processes,manufacturing | Markov process,Assembly systems,Computer science,Markov model,Integrated circuit packaging,Electronic engineering,Figure of merit,Chip,Very-large-scale integration,Reliability engineering,Quality assurance | Conference |
Volume | Issue | ISSN |
47 | 10 | Journal of Systems Architecture |
ISBN | Citations | PageRank |
0-7695-0719-0 | 4 | 0.54 |
References | Authors | |
16 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| N. Park | 1 | 39 | 7.43 |
| Fred J. Meyer | 2 | 4 | 0.54 |
| F. Lombardi | 3 | 232 | 24.13 |