Name
Title | ||
|---|---|---|
Simde: An Educational Simulator Of Ilp Architectures With Dynamic And Static Scheduling |
Abstract | ||
|---|---|---|
This article presents SIMDE, a cycle-by-cycle simulator to support teaching of Instruction -Level Parallelism (ILP) architectures. The simulator covers dynamic and static instruction scheduling by using a shared structure for both approaches. Dynamic scheduling is illustrated by means of a simple superscalar processor based on Tomasulo's algorithm. A basic Very Long Instruction Word (VLIW) processor has been designed for static scheduling. The simulator is intended as an aid-tool for teaching theoretical contents in Computer Architecture and Organization courses. The students are provided with an easy-to-use common environment to perform different simulations and comparisons between superscalar and VLIW processors. Furthermore, the simulator has been tested by students in a Computer Architecture course in order to assess its real usefulness. (C) 2007 Wiley Periodicals, Inc. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1002/cae.20154 | COMPUTER APPLICATIONS IN ENGINEERING EDUCATION |
Keywords | Field | DocType |
computer architecture, educational technology, simulation, processor scheduling | Educational technology,Computer architecture,Instruction scheduling,Fair-share scheduling,Computer architecture simulator,Very long instruction word,Computer science,Simulation,Scheduling (computing),Parallel computing,Tomasulo algorithm,Dynamic priority scheduling | Journal |
Volume | Issue | ISSN |
15 | 3 | 1061-3773 |
Citations | PageRank | References |
2 | 0.51 | 3 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| I. Castilla | 1 | 7 | 1.29 |
| Lorenzo Moreno | 2 | 104 | 15.25 |
| C. González | 3 | 119 | 19.59 |
| J. Sigut | 4 | 65 | 5.67 |
| Evelio J. González | 5 | 96 | 15.32 |