Paper Info
Title
A Fast Architecture Exploration Method For High Throughput Ieee 802.11e Mac Implementation Using Systemc
Abstract
This paper presents a fast and systematic architecture exploration method that realizes an efficient IEEE 802.11e based hardware/software co-design Medium Access Control (MAC) system architecture, which can achieve near theoretical MAC throughput for burst data transmission while complying with strict channel access time requirements. Our design approach uses SystemC based Transaction Level Modeling (TLM) framework to integrate reconfigurable general purpose computing and communication resources into the application model for rapid evaluation of core parameters, system performance, and application specific optimizations. As a result, a MAC system architecture that achieves a simulated MAC throughput of more than 100 Mbps when transmitted at 260 Mbps of Physical Layer (PHY) data rate is obtained. This result is verified with X-X-IMPLEMENTATION on a Xilinx Field-Programmable Gate Array (FPGA) board.
Year
DOI
Venue
2010
10.1587/transcom.E93.B.2833
IEICE TRANSACTIONS ON COMMUNICATIONS
Keywords
Field
DocType
SystemC, transaction level modeling, IEEE 802.11 MAC
Network allocation vector,Computer science,Transaction-level modeling,Computer network,Field-programmable gate array,SystemC,Physical layer,IEEE 802,Throughput,Systems architecture,Embedded system
Journal
Volume
Issue
ISSN
E93B
10
0916-8516
Citations 
PageRank 
References 
0
0.34
0
Authors
5
Name
Order
Citations
PageRank
Sung-Rok Yoon172.50
Min Li Huang211.36
Sang-Ho Seo332.54
Hiroshi Ochi441.67
Sin-Chong Park58022.58