Name
Abstract | ||
|---|---|---|
Multi-dimensional (MD) Discrete Fourier Transform (DFT) is a key kernel algorithm in many signal processing algorithms, including radar data processing and medical imaging. Although there are many efficient software solutions, they are not suitable for applications that require fast response time. In this paper we focus on FPGA-based implementation of MDDFT. The proposed architecture is based on a decomposition algorithm that takes into account FPGA resources and the characteristics of off-chip memory access, namely, the burst access pattern of the Synchronous Dynamic RAM (SDRAM). The architecture can support 2D, 3D, and even higher dimensional DFT with high performance. It has been implemented on a Xilinx Virtex-5 FPGA platform and its performance for 2D and 3D DFT measured and analyzed. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ICASSP.2010.5495495 | ICASSP |
Keywords | Field | DocType |
signal processing,dft,radar data processing,multidimensional dft,dram chips,discrete fourier transforms,dram,synchronous dynamic ram,xilinx virtex-5 fpga platform,fpga,field programmable gate arrays,medical imaging,multidimensional signal processing,kernel,discrete fourier transform,computer architecture,radar imaging,chip,data processing,biomedical imaging,application software | Signal processing,Multidimensional signal processing,Computer science,Software,Artificial intelligence,Computer hardware,Dynamic random-access memory,Kernel (linear algebra),Pattern recognition,Parallel computing,Field-programmable gate array,Bandwidth (signal processing),Discrete Fourier transform | Conference |
ISSN | ISBN | Citations |
1520-6149 E-ISBN : 978-1-4244-4296-6 | 978-1-4244-4296-6 | 3 |
PageRank | References | Authors |
0.52 | 2 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chi-Li Yu | 1 | 39 | 5.45 |
| Chaitali Chakrabarti | 2 | 1978 | 184.17 |
| Sungho Park | 3 | 74 | 9.02 |
| Narayanan Vijaykrishnan | 4 | 6955 | 524.60 |