Title
A 20 Mb/s Phase Modulator Based on a 3.6 GHz Digital PLL With -36 dB EVM at 5 mW Power.
Abstract
This paper presents a low-power high-bit-rate phase modulator based on a digital PLL with single-bit TDC and two-point injection scheme. At high bit rates, this scheme requires a controlled oscillator with wide tuning range and becomes critically sensitive to the delay spread between the two injection paths, considerably degrading the achievable error-vector magnitude and causing significant spect...
Year
DOI
Venue
2012
10.1109/JSSC.2012.2217854
IEEE Journal of Solid-State Circuits
Keywords
Field
DocType
Phase locked loops,Frequency modulation,Phase modulation,Tuning,Bandwidth
Wideband,Phase-locked loop,Phase modulation,Computer science,Control theory,Electronic engineering,Voltage-controlled oscillator,Frequency synthesizer,Modulation,Bandwidth (signal processing),Frequency modulation,Electrical engineering
Journal
Volume
Issue
ISSN
47
12
0018-9200
Citations 
PageRank 
References 
7
0.51
0
Authors
4
Name
Order
Citations
PageRank
Giovanni Marzin1785.26
Salvatore Levantino235143.23
Carlo Samori334939.76
Andrea L. Lacaita432042.41